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Design for Trade-Off Analysis

  • Date Submitted: 05/03/2012 01:12 PM
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Session 3: Design Tradeoff Analysis

Characterization, Tracing, and Optimization of Commercial I/O Workloads H. Huang, M. Teshome, J. Casmira and D.R. Kaeli Northeastern University Computer Architecture Research Laboratory Brian Garrett and William Zahavi EMC Corporation Trace-driven Performance Exploration of a PowerPC 601 OLTP Workload on Wide Superscalar Processors J.H. Moreno, M. Moudgill, J.D. Wellman, P.Bose, L. Trevillyan IBM T.J. Watson Research Center Performance Analysis of Shadow Directory Prefetching for TPC-C Dan Friendly - University of Michigan Mark Charney - IBM Research Evaluating Branch Prediction Methods for an S390 Processor using Traces from Commercial Application Workloads Rolf B. Hilgendorf, IBM Entwicklung GmbH, Boeblingen, Germany Gerald J. Heim, Wilhelm Schichard-Institut fuer Informatik, Universitaet Tuebingen, Tuebingen, Germany

Characterization, Tracing and Optimization of Commercial I/O Workloads
David Kaeli Northeastern University Computer Architecture Research Laboratory Boston, MA kaeli@ece.neu.edu

Participants in this project
Hua Huang Melaku Teshome Jason Casmira

EMC Corporation
Brian Garrett William Zahavi



Introduction ICDA architecture and performance I/O tracing and workload characterization I/O caching Performance modeling and results Summary and future work

Commercial applications (e.g., transaction processing) have become heavily dependent on high speed, reliable, mass storage (TB - PB) Integrated Cached Disk Arrays (EMC Symmetrix) have become the design of choice to supply high-end storage needs for business



ICDA Architecture
E M C IC D A C ache

ICDA Architectures
Fault tolerant and recoverable

RAID Battery backed up cache Dual redundant controllers Hot pluggable disks and controllers

R A ID D is k s

High performance and scaleable
Large amount of cache memory (4 GB) Aggressive caching...


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