Words of Wisdom:

"Your cillage called. They're missing an idiot." - Ominerxaycaf


  • Date Submitted: 11/07/2011 10:35 AM
  • Flesch-Kincaid Score: 56.3 
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The residue number system (RNS) has been employed for efficient parallel carry-free arithmetic computations (addition, subtraction, and multiplication) in DSP applications as the computations for each residue channel can independently be done without carry propagation. A residue number system is defined by a set of N integer constants, {m1, m2, m3, ... , mN },referred to as the moduli. Let M be the least common multiple of all the mi. Any arbitrary integer X smaller than M can be represented in the defined residue number system as a set of modulus. RNS based computations can achieve significant speedup over the binarysystem-based computation, they are widely used in DSP processors, FIR filters, and communication components Arithmetic modulo 2n + 1 computation is one of the most common RNS operations that are used in pseudorandom number generation and cryptography [The modulo 2n + 1addition is the most crucial step among the commonly used moduli sets, such as {2n − 1, 2n, 2n + 1}, {2n − 1, 2n, 2n + 1, 22n + 1} and {2n − 1, 2n, 2n + 1, 2n+1 + 1}. There are many previously reported methods to speed up the modulo 2n + 1 addition. Depending on the input/output data representations,these methods can be classified into two categories, namely,diminished-1 and weighted respectively. In the diminished-1 representation, each input and output operand is decreased by 1 compared with its weighted representation. Therefore, only n-bit operands are needed in diminished-1 modulo 2n + 1 addition, leading to smaller and faster components. However, this incurs an overhead due to the translators from/to the binary weighted system. On the other hand, the weighted-1 representation uses (n + 1)-bit operands for computations, avoiding the overhead of translators, but requires larger area compared with the diminished-1 representations. The general operations in modulo 2n + 1 addition were discussed including diminished-1 and weighted modulo addition. parallel-prefix...


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